66 lines
3.0 KiB
Diff
66 lines
3.0 KiB
Diff
diff --git a/deps/base64/base64/lib/arch/avx/codec.c b/deps/base64/base64/lib/arch/avx/codec.c
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index b069618e..589932a8 100644
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--- a/deps/base64/base64/lib/arch/avx/codec.c
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+++ b/deps/base64/base64/lib/arch/avx/codec.c
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@@ -13,7 +13,7 @@
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// Only enable inline assembly on supported compilers and on 64-bit CPUs.
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#ifndef BASE64_AVX_USE_ASM
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-# if (defined(__GNUC__) || defined(__clang__)) && BASE64_WORDSIZE == 64
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+# if (defined(__GNUC__) || defined(__clang__)) && BASE64_WORDSIZE == 64 && !defined(__i386__)
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# define BASE64_AVX_USE_ASM 1
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# else
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# define BASE64_AVX_USE_ASM 0
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diff --git a/deps/base64/base64/lib/arch/avx2/codec.c b/deps/base64/base64/lib/arch/avx2/codec.c
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index 8a2aa4a6..55332b0b 100644
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--- a/deps/base64/base64/lib/arch/avx2/codec.c
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+++ b/deps/base64/base64/lib/arch/avx2/codec.c
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@@ -13,7 +13,7 @@
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// Only enable inline assembly on supported compilers and on 64-bit CPUs.
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#ifndef BASE64_AVX2_USE_ASM
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-# if (defined(__GNUC__) || defined(__clang__)) && BASE64_WORDSIZE == 64
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+# if (defined(__GNUC__) || defined(__clang__)) && BASE64_WORDSIZE == 64 && !defined(__i386__)
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# define BASE64_AVX2_USE_ASM 1
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# else
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# define BASE64_AVX2_USE_ASM 0
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diff --git a/deps/base64/base64/lib/arch/sse41/codec.c b/deps/base64/base64/lib/arch/sse41/codec.c
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index 6e5afe30..3d8d8868 100644
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--- a/deps/base64/base64/lib/arch/sse41/codec.c
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+++ b/deps/base64/base64/lib/arch/sse41/codec.c
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@@ -13,7 +13,7 @@
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// Only enable inline assembly on supported compilers and on 64-bit CPUs.
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#ifndef BASE64_SSE41_USE_ASM
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-# if (defined(__GNUC__) || defined(__clang__)) && BASE64_WORDSIZE == 64
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+# if (defined(__GNUC__) || defined(__clang__)) && BASE64_WORDSIZE == 64 && !defined(__i386__)
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# define BASE64_SSE41_USE_ASM 1
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# else
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# define BASE64_SSE41_USE_ASM 0
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diff --git a/deps/base64/base64/lib/arch/sse42/codec.c b/deps/base64/base64/lib/arch/sse42/codec.c
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index dde823b7..17692dad 100644
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--- a/deps/base64/base64/lib/arch/sse42/codec.c
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+++ b/deps/base64/base64/lib/arch/sse42/codec.c
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@@ -13,7 +13,7 @@
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// Only enable inline assembly on supported compilers and on 64-bit CPUs.
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#ifndef BASE64_SSE42_USE_ASM
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-# if (defined(__GNUC__) || defined(__clang__)) && BASE64_WORDSIZE == 64
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+# if (defined(__GNUC__) || defined(__clang__)) && BASE64_WORDSIZE == 64 && !defined(__i386__)
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# define BASE64_SSE42_USE_ASM 1
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# else
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# define BASE64_SSE42_USE_ASM 0
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diff --git a/deps/base64/base64/lib/arch/ssse3/codec.c b/deps/base64/base64/lib/arch/ssse3/codec.c
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index a812a290..6f463444 100644
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--- a/deps/base64/base64/lib/arch/ssse3/codec.c
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+++ b/deps/base64/base64/lib/arch/ssse3/codec.c
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@@ -15,7 +15,7 @@
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// 32-bit CPUs with SSSE3 support, such as low-end Atoms, only have eight XMM
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// registers, which is not enough to run the inline assembly.
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#ifndef BASE64_SSSE3_USE_ASM
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-# if (defined(__GNUC__) || defined(__clang__)) && BASE64_WORDSIZE == 64
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+# if (defined(__GNUC__) || defined(__clang__)) && BASE64_WORDSIZE == 64 && !defined(__i386__)
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# define BASE64_SSSE3_USE_ASM 1
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# else
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# define BASE64_SSSE3_USE_ASM 0
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