diff --git a/mozilla/security/coreconf/SunOS5.mk b/mozilla/security/coreconf/SunOS5.mk index 57cc8b8b8f5..8bc35e67b2e 100644 --- a/mozilla/security/coreconf/SunOS5.mk +++ b/mozilla/security/coreconf/SunOS5.mk @@ -23,9 +23,9 @@ ifeq ($(USE_64), 1) else ifneq ($(OS_TEST),i86pc) ifdef NS_USE_GCC - ARCHFLAG=-mcpu=v8 + ARCHFLAG=-mcpu=v9 else - ARCHFLAG=-xarch=v8 + ARCHFLAG=-xarch=v8plus endif endif endif diff --git a/mozilla/security/nss/lib/freebl/Makefile b/mozilla/security/nss/lib/freebl/Makefile index 9b4b095a33d..0d293f14e13 100644 --- a/mozilla/security/nss/lib/freebl/Makefile +++ b/mozilla/security/nss/lib/freebl/Makefile @@ -284,7 +284,6 @@ ifeq ($(CPU_ARCH),sparc) HAVE_ABI64_INT = 1 HAVE_ABI64_FPU = 1 else - HAVE_ABI32_INT32 = 1 HAVE_ABI32_FPU = 1 HAVE_ABI32_INT64 = 1 endif @@ -292,9 +291,6 @@ ifeq ($(CPU_ARCH),sparc) SOLARIS_AS = /usr/ccs/bin/as #### set arch, asm, c flags ifdef NS_USE_GCC - ifdef USE_ABI32_INT32 - # default ARCHFLAG=-mcpu=v8 set by coreconf/sunOS5.mk - endif ifdef USE_ABI32_INT64 ARCHFLAG=-mcpu=v9 -Wa,-xarch=v8plus SOLARIS_AS_FLAGS = -xarch=v8plus -K PIC @@ -327,9 +323,6 @@ ifeq ($(CPU_ARCH),sparc) # to what we used in NSS 3.10. FPU_TARGET_OPTIMIZER = -xchip=ultra2 endif - ifdef USE_ABI32_INT32 - #ARCHFLAG=-xarch=v8 set in coreconf/sunOS5.mk - endif ifdef USE_ABI32_INT64 # this builds for Sparc v8+a ABI32_FPU architecture, 64-bit registers, # 32-bit ABI, it uses 64-bit words, integer arithmetic, @@ -385,12 +378,6 @@ ifeq ($(CPU_ARCH),sparc) endif # NS_USE_GCC ### set flags for both GCC and Sun cc - ifdef USE_ABI32_INT32 - # this builds for Sparc v8 pure 32-bit architecture - DEFINES += -DMP_USE_UINT_DIGIT -DMP_ASSEMBLY_MULTIPLY - ASFILES = mpv_sparcv8x.s - DEFINES += -DSHA_NO_LONG_LONG # avoid 64-bit arithmetic in SHA512 - endif ifdef USE_ABI32_INT64 # this builds for Sparc v8+a ABI32_FPU architecture, 64-bit registers, # 32-bit ABI, it uses 64-bit words, integer arithmetic, no FPU diff --git a/mozilla/security/nss/lib/freebl/loader.c b/mozilla/security/nss/lib/freebl/loader.c index 767ee592ccf..df31ee84644 100644 --- a/mozilla/security/nss/lib/freebl/loader.c +++ b/mozilla/security/nss/lib/freebl/loader.c @@ -4,7 +4,7 @@ * This Source Code Form is subject to the terms of the Mozilla Public * License, v. 2.0. If a copy of the MPL was not distributed with this * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -/* $Id: loader.c,v 1.60 2013-02-06 22:20:22 wtc%google.com Exp $ */ +/* $Id: loader.c,v 1.61 2013-02-15 18:48:42 wtc%google.com Exp $ */ #include "loader.h" #include "prmem.h" @@ -36,7 +36,8 @@ const static char fpu_hybrid_isa[] = "sparcv9+vis"; const static char fpu_hybrid_shared_lib[] = "libfreebl_32fpu_3.so"; const static char int_hybrid_shared_lib[] = "libfreebl_32int64_3.so"; -const static char non_hybrid_shared_lib[] = "libfreebl_32int_3.so"; +/* This was for SPARC V8, now obsolete. */ +const static char *const non_hybrid_shared_lib = NULL; const static char int_hybrid_isa[] = "sparcv8plus"; const static char fpu_hybrid_isa[] = "sparcv8plus+vis"; diff --git a/mozilla/security/nss/lib/freebl/mpi/mpv_sparcv8x.s b/mozilla/security/nss/lib/freebl/mpi/mpv_sparcv8x.s deleted file mode 100644 index 8917668f1f0..00000000000 --- a/mozilla/security/nss/lib/freebl/mpi/mpv_sparcv8x.s +++ /dev/null @@ -1,144 +0,0 @@ -! Inner multiply loop functions for pure 32-bit Sparc v8 CPUs. -! This Source Code Form is subject to the terms of the Mozilla Public -! License, v. 2.0. If a copy of the MPL was not distributed with this -! file, You can obtain one at http://mozilla.org/MPL/2.0/. - -! $Id: mpv_sparcv8x.s,v 1.3 2012-04-25 14:49:50 gerv%gerv.net Exp $ - - .file "mpv_sparcv8x.s" - .align 8 - - .section ".text",#alloc,#execinstr - .global s_mpv_mul_d - s_mpv_mul_d: - save %sp, -0x60, %sp - mov %i0, %o0 - clr %g4 - cmp %i1, 0x0 - be .L103 - sub %i1, 0x1, %o5 - ld [%o0], %g1 -.L101: - umul %g1, %i2, %g2 - rd %y, %g1 - add %g2, %g4, %g3 - mov %g1, %o4 - add %o0, 0x4, %o0 - cmp %g3, %g4 - blu,a .L102 - add %g1, 0x1, %o4 -.L102: - st %g3, [%i3] - mov %o5, %g1 - add %i3, 0x4, %i3 - cmp %g1, 0x0 - mov %o4, %g4 - sub %o5, 0x1, %o5 - bne,a .L101 - ld [%o0], %g1 -.L103: - st %g4, [%i3] - ret - restore - - .type s_mpv_mul_d,2 - .size s_mpv_mul_d,(.-s_mpv_mul_d) - - .align 16 - .global s_mpv_mul_d_add - s_mpv_mul_d_add: - - save %sp, -0x60, %sp - mov %i0, %o0 - clr %g4 - cmp %i1, 0x0 - be .L204 - sub %i1, 0x1, %o5 - ld [%o0], %g1 -.L201: - umul %g1, %i2, %g2 - rd %y, %g1 - add %g2, %g4, %g3 - mov %g1, %o4 - add %o0, 0x4, %o0 - cmp %g3, %g4 - blu,a .L202 - add %g1, 0x1, %o4 -.L202: - ld [%i3], %g2 - add %g3, %g2, %g1 - cmp %g1, %g2 - blu,a .L203 - add %o4, 0x1, %o4 -.L203: - st %g1, [%i3] - mov %o5, %g1 - add %i3, 0x4, %i3 - cmp %g1, 0x0 - mov %o4, %g4 - sub %o5, 0x1, %o5 - bne,a .L201 - ld [%o0], %g1 -.L204: - st %g4, [%i3] - ret - restore - - .type s_mpv_mul_d_add,2 - .size s_mpv_mul_d_add,(.-s_mpv_mul_d_add) - - .align 16 - .global s_mpv_mul_d_add_prop - s_mpv_mul_d_add_prop: - - save %sp, -0x60, %sp - mov %i0, %o0 - clr %o5 - cmp %i1, 0x0 - be .L30x70 - sub %i1, 0x1, %g4 - ld [%o0], %g1 -.L30x1c: - umul %g1, %i2, %g2 - rd %y, %g1 - add %g2, %o5, %g3 - mov %g1, %o4 - add %o0, 0x4, %o0 - cmp %g3, %o5 - blu,a .L30x3c - add %g1, 0x1, %o4 -.L30x3c: - ld [%i3], %g2 - add %g3, %g2, %g1 - cmp %g1, %g2 - blu,a .L30x50 - add %o4, 0x1, %o4 -.L30x50: - st %g1, [%i3] - mov %g4, %g1 - add %i3, 0x4, %i3 - cmp %g1, 0x0 - mov %o4, %o5 - sub %g4, 0x1, %g4 - bne,a .L30x1c - ld [%o0], %g1 -.L30x70: - cmp %o5, 0x0 - be .L30xa0 - nop - ld [%i3], %g1 -.L30x80: - add %o5, %g1, %g2 - st %g2, [%i3] - add %i3, 0x4, %i3 - cmp %g2, %g1 - addx %g0, 0x0, %o5 - cmp %o5, 0x0 - bne,a .L30x80 - ld [%i3], %g1 -.L30xa0: - ret - restore - - .type s_mpv_mul_d_add_prop,2 - .size s_mpv_mul_d_add_prop,(.-s_mpv_mul_d_add_prop)